Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor memory device










Image Number 4 for United States Patent #8130581.

The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected to one pair of common read data lines, parasitic capacitance connected to the pair of common read data lines is reduced and, accordingly, time in which the potential difference between the pair of common read data lines increases is shortened. Thus, while preventing enlargement of the chip layout area, read time can be shortened.








 
 
  Recently Added Patents
Fibrous laminate interface for security coatings
System and method for detecting malicious code executed by virtual machine
Composite conductive pads/plugs for surface-applied nerve-muscle electrical stimulation
Means to securely fixate pacing leads and/or sensors in vessels
Sample chamber for laser ablation inductively coupled plasma mass spectroscopy
(4950
Face recognition through face building from two or more partial face images from the same face
  Randomly Featured Patents
Method of manufacturing a magnetic slider head
Step for pickup truck tailgate
Touchscreen display with plural cameras
Light fixture housing
Apparatus for making enzyme inactivated viscous fruit pulp and products therefrom
Semiconductor memory
Antifog coating and antifog article
Paraffin dispersants with a lubricity effect for distillates of petroleum products
High bus bandwidth transfer using split data bus
Signal shielding box with a plurality of shielding covers