Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor memory device










Image Number 4 for United States Patent #8130581.

The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected to one pair of common read data lines, parasitic capacitance connected to the pair of common read data lines is reduced and, accordingly, time in which the potential difference between the pair of common read data lines increases is shortened. Thus, while preventing enlargement of the chip layout area, read time can be shortened.








 
 
  Recently Added Patents
Light emitting diode package and method of fabricating the same
Aqueous composition with agents to inhibit water evaporation
Indicating transfer in an IMS network
Apparatus for performing timer management regarding a system timer scheduler service, and associated method
Audio signal clip detection
Products for animal use including humans having a certificate verifying at least one of efficacy or safety, and methods of providing such certificates
Method and system for encrypting data in a wireless communication system
  Randomly Featured Patents
Method and apparatus for optimizing optical recording
Method and apparatus of clock control associated with read latency for a card device
Management interface for license management system
Automatic transmission having nested clutch housings
Target value processing unit, temperature controller, control process implementing system, process controlling method, target value processing program, and recording medium
Exercise stool or similar article
Demand cardiac pacemaker having reduced polarity disparity
Mug
Powder metallurgy methods and compositions
Resonant circuit arrangement, method for operating said resonant circuit arrangement and method for the operation and use thereof