Resources Contact Us Home
Write circuitry for hierarchical memory architecture

Image Number 4 for United States Patent #8130567.

A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.

  Recently Added Patents
Synchronization of sound generated in binaural hearing system
Dihydronaphthyridinyl(organo)methanone analogs as positive allosteric mGluR5 modulators
Satellite mounting pole
Multi-state DC-DC converter having undirectional switches
Assembly for providing an aligned stack of two or more modules and a lithography system or a microscopy system comprising such an assembly
Methods and apparatus to provide haptic feedback
  Randomly Featured Patents
Airborne pump boat
Modular dictation/transcription system
Load pickup coupling device and method
Focus condition detecting device
Miscible displacement oil recovery method
Oil well pump driving unit
Machine for the continuous production of whipped cream
Flow control valve
Method for improving light fastness of images, and image forming material
Telecommunications switch chassis having housing with front and rear compartments divided by interior partition and removable cover over rear compartment