Resources Contact Us Home
EEPROM with increased reading speed

Image Number 12 for United States Patent #8129774.

In an EEPROM consisting of a NAND cell in which a plurality of memory cells are connected in series, the control gate voltage of the memory cell in a block selected by the data read operation is made different from the each of the voltages V.sub.sg1, V.sub.sg2 of the select gate of the select transistor in the selected block so as to make it possible to achieve a high speed reading without bringing about the breakdown of the insulating film interposed between the select gate and the channel of the select transistor. The high speed reading can also be made possible in the DINOR cell, the AND cell, NOR cell and the NAND cell having a single memory cell connected thereto, if the control gate voltage of the memory cell is made different from the voltage of the select gate of the select transistor.

  Recently Added Patents
Halogen-free flame retardants for epoxy resin systems
Message transfer apparatus, output method, and computer program product
Caprazene as a novel compound and derivatives thereof, and caprazol as a novel compound and derivatives thereof
Direct chemical vapor deposition of graphene on dielectric surfaces
Coreference resolution in an ambiguity-sensitive natural language processing system
Sense-amplifier monotizer
  Randomly Featured Patents
Semiconductor device and process for production thereof
Liquid ejecting apparatus
Page turner
Adaptive image improvement
Tomosynthesis apparatus
Microwave applicator for radiating microwaves to an elongated zone
Printing press having blanket cylinder with filler bar and blanket
System and method for utilizing a user non-perceivable light source in a machine
Toner and development agent
Butter dish