Resources Contact Us Home
EEPROM with increased reading speed

Image Number 12 for United States Patent #8129774.

In an EEPROM consisting of a NAND cell in which a plurality of memory cells are connected in series, the control gate voltage of the memory cell in a block selected by the data read operation is made different from the each of the voltages V.sub.sg1, V.sub.sg2 of the select gate of the select transistor in the selected block so as to make it possible to achieve a high speed reading without bringing about the breakdown of the insulating film interposed between the select gate and the channel of the select transistor. The high speed reading can also be made possible in the DINOR cell, the AND cell, NOR cell and the NAND cell having a single memory cell connected thereto, if the control gate voltage of the memory cell is made different from the voltage of the select gate of the select transistor.

  Recently Added Patents
Leg stretching device
Heat transfer label for decorating a metal container
Process for the preparation of morphinane analogues
Motor vehicle, toy and/or replica
Method and apparatus for efficiently inserting fills in an integrated circuit layout
High conductive water-based silver ink
  Randomly Featured Patents
Socket with a timer
Method for vapor depositing a cerium oxide film
Insecticidal compositions comprising N'-aryl-N-methylformamidines and 3-phenoxybenzyl carboxylates
VOIP access gateway
Edge configuration for a watersport board fin
Aster plant named `Yomagic`
Expansible chamber device having rotating piston braking and rotating piston synchronizing systems
Polynucleotides encoding a novel human G-protein coupled receptor splice variant HGPRBMY29sv1
Hydrogen chloride recovery
Apparatus for guiding a vehicle onto a service lift using a machine vision wheel alignment system