Resources Contact Us Home
EEPROM with increased reading speed

Image Number 12 for United States Patent #8129774.

In an EEPROM consisting of a NAND cell in which a plurality of memory cells are connected in series, the control gate voltage of the memory cell in a block selected by the data read operation is made different from the each of the voltages V.sub.sg1, V.sub.sg2 of the select gate of the select transistor in the selected block so as to make it possible to achieve a high speed reading without bringing about the breakdown of the insulating film interposed between the select gate and the channel of the select transistor. The high speed reading can also be made possible in the DINOR cell, the AND cell, NOR cell and the NAND cell having a single memory cell connected thereto, if the control gate voltage of the memory cell is made different from the voltage of the select gate of the select transistor.

  Recently Added Patents
Cylindrical hair band
Advance manufacturing monitoring and diagnostic tool
Surgical compositions for reducing the incidence of adhesions
Modulators of ATP-binding cassette transporters
Diagnostic imaging apparatus, medical system and protocol managing method
Method and apparatus for light emitting diode control
Inventory and patient management system
  Randomly Featured Patents
Multiple protocol trading system
Methods of synchronizing with first multipath component in ultra wideband receiver and ultra wideband receivers using the same
Knife sharpening device
Dual satellite navigation system and method
Date mechanism for a timepiece
Vehicle speaker
Building block
Viral polymerase inhibitors
Method for producing perylene-3,4-dicarboxylic acid imides
Efficient navigation routing system and method