Image Number 5 for United States Patent #8129723.
A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.
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