Resources Contact Us Home
Method of manufacturing a memory device

Image Number 17 for United States Patent #8129242.

A method of manufacturing a flash memory device having an enhanced gate coupling ratio includes steps of forming a first semiconductor layer on a substrate and forming a semiconductor spacer layer on top of the first semiconductor layer. The semiconductor spacer layer includes a plurality of recesses. The method provides a semiconductor spacer structure which functions to increase the contact area between a floating gate and a control gate of the flash memory device.

  Recently Added Patents
Treatment of celiac disease with IgA
System and method for distributing emergency data messages to public safety answering points in a balanced manner
Method for designing sunlight-reflection and heat-radiation multilayer film
Segmentation of a product markup image based on color and color differences
Method and apparatus for using service capability information for user plane location
Emulsions containing arylboronic acids and medical articles made therefrom
Optical writer and image forming apparatus including same
  Randomly Featured Patents
Catalytic reforming of alkyleneamines
Flex-line vibration isolator and cryopump with vibration isolation
Long-hour video/audio compression device and method thereof
System and method for optimizing branch logic for handling hard to predict indirect branches
Device for the alignment of an optical fiber and an optoelectronic component
Blister package
Cordless hoist
Low density parity code encoding device and decoding device and encoding and decoding methods thereof
Exposure apparatus used for the manufacture of a color cathode-ray tube phosphor screen