Resources Contact Us Home
Method of manufacturing a memory device

Image Number 17 for United States Patent #8129242.

A method of manufacturing a flash memory device having an enhanced gate coupling ratio includes steps of forming a first semiconductor layer on a substrate and forming a semiconductor spacer layer on top of the first semiconductor layer. The semiconductor spacer layer includes a plurality of recesses. The method provides a semiconductor spacer structure which functions to increase the contact area between a floating gate and a control gate of the flash memory device.

  Recently Added Patents
Device for accurately measuring concentration of component in blood and control method of the device
Semiconductor devices having multi-width isolation layer structures
Method and apparatus for feeding a polyurethane mixture into hollow bodies
High productivity single pass scanning system
Immunotherapy in cancer treatment
Proton conducting electrolytes with cross-linked copolymer additives for use in fuel cells
  Randomly Featured Patents
Distributed plant control system
Rolling roller
Engine and fuel shutdown control
Method for driving plasma display panel
Intermediates for the preparation of sulphonic acid salts of 4-amino-2-cyclopentene-1-carboxylic acid
Modular drain field section
Display apparatus and method therefor
External cardiac stress reduction method
User interface for remote control of medical devices
Bottom rail of a venetian blind assembly