Resources Contact Us Home
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode

Image Number 5 for United States Patent #8129236.

After forming the outer drain and source regions of an N-channel transistor, the spacer structure may be removed on the basis of an appropriately designed etch stop layer so that a rigid material layer may be positioned more closely to the gate electrode, thereby enhancing the overall strain-inducing mechanism during a subsequent anneal process in the presence of the material layer and providing an enhanced stress memorization technique (SMT). In some illustrative embodiments, a selective SMT approach may be provided.

  Recently Added Patents
Electronic equipment and television receiver utilizing multimodal multifunction voice commands
Packet scheduling method and communication apparatus using the same
Maize variety hybrid X85A663
Dynamic microphone unit and dynamic microphone
Communication device and communication method
Heat sink system and heat sinking method having auto switching function
Drawer for holding beverage cup
  Randomly Featured Patents
Semi-permeable and partly flushable potty liner
Printed circuit board assembly with improved thermal performance
Light emitting diode lamp
Computer system serialization control method involving unlocking global lock of one partition, after completion of machine check analysis regardless of state of other partition locks
High voltage transcutaneous electrical stimulation device and method
Body pillow
Ozone decomposing filter
High-strength spring steel wire
Colouring preparations
Spindle drive assembly with recirculating balls