Resources Contact Us Home
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode

Image Number 5 for United States Patent #8129236.

After forming the outer drain and source regions of an N-channel transistor, the spacer structure may be removed on the basis of an appropriately designed etch stop layer so that a rigid material layer may be positioned more closely to the gate electrode, thereby enhancing the overall strain-inducing mechanism during a subsequent anneal process in the presence of the material layer and providing an enhanced stress memorization technique (SMT). In some illustrative embodiments, a selective SMT approach may be provided.

  Recently Added Patents
Herbal composition for the treatment of wound healing, a regenerative medicine
5-lipoxygenase-activating protein (FLAP) inhibitors
DNA promoters and anthrax vaccines
Plants and seeds of hybrid corn variety CH817100
Vehicle seating system and method for reducing fatigue with changing actuator movement
Powerline communication receiver
  Randomly Featured Patents
Alkylated citric acid adducts as antiwear and friction modifying additives
Pedestal for magnetically suspending a bar of soap
Fiberoptic intubating scope with camera and lightweight portable screen and method of using same
Method of producing herbicide resistant plant varieties and plants produced thereby
Ergonomic machine control console
Planarization stop layer in phase change memory integration
Support for tubesheets in hollow fiber permeators
Heat activated applique on pressure sensitive release paper and method of making
Catalyst for polymerization of olefin and process for the preparation of olefin polymer
Portable apparatus and method of measuring wireless channel and multiple antenna correlation