Resources Contact Us Home
Electrolytic depositon and via filling in coreless substrate processing

Image Number 2 for United States Patent #8127979.

Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.

  Recently Added Patents
Pyridylphenyl compounds for inflammation and immune-related uses
Ion beam system and method of operating ion beam system
Method for playing digital media files with a digital media player using a plurality of playlists
Method for drug screening and characterization by calcium flux
Device and method for generating soft tissue contrast images
Apparatus, electronic component and method for generating reference voltage
Method, system and computer program product for verifying floating point divide operation results
  Randomly Featured Patents
Method of manufacturing solar collector module
Method and apparatus for automatic installation of shared printers over a network
Method for generation and use of isotopic patterns in mass spectral data of simple organisms
Apparatus for folding and cutting paper
Sanitary commode mat
Self-loading magnetic head slider
4U fluorescent tube
Automatic water level system for swimming pools
Branched spike bird deterrent
Method and device for detecting an angular position signal for an internal-combustion engine