Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Electrolytic depositon and via filling in coreless substrate processing










Image Number 2 for United States Patent #8127979.

Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.








 
 
  Recently Added Patents
Single well reservoir characterization apparatus and methods
Cake knife handle
Mobility management in a communications system
Sericin cationic nanoparticles for application in products for hair and dyed hair
Luggage
Method and apparatus for token-based context caching
Front end for RF transmitting-receiving systems with implicit directional control and time-multiplexing method in submicron technology
  Randomly Featured Patents
Potato and rock sorter
Media dispenser having a variable constriction outlet
Variable mode averager
Dough moulder
Silicone remover
Organic EL device
Magnetic toner for MICR printers, developer for MICR printers and manufacturing method thereof
Polarized magnet system
Wear assembly
Apparatus for processing a workpiece