Resources Contact Us Home
Devices with faraday cages and internal flexibility sipes

Image Number 18 for United States Patent #8125796.

A computer or microchip comprising an outer chamber and at least one inner chamber inside the outer chamber. The outer chamber and the inner chamber being separated at least in part by an internal sipe, and at least a portion of a surface of the outer chamber forming at least a portion of a surface of the internal sipe. The internal sipe has opposing surfaces that are separate from each other and therefore can move relative to each other, and at least a portion of the opposing surfaces are in contact with each other in a unloaded condition. The outer chamber including a Faraday Cage. A computer, comprising an undiced semiconductor wafer having a multitude of microchips. The multitude of microchips on the wafer forming a plurality of independently functioning computers, each computer having independent communication capabilities.

  Recently Added Patents
Method of making an array of nucleic acid colonies
Cascode circuit device with improved reverse recovery characteristic
Binary-to-gray converting circuits and gray code counter including the same
Strategic planning management
2,2'-binaphthalene ester chiral dopants for cholesteric liquid crystal displays
Electrode assembly with centrally wound separator member
Determining ill conditioning in square linear system of equations
  Randomly Featured Patents
Helicopter cable and equipment guide with shock absorbency
Apparatus and method for removing carbon dioxide contained in exhaust gas
Method of changing a rotating mode between constant angular velocity and constant linear velocity
Combined cap and container
Systems and methods for multiple level control of access of privileges to protected media content
Electronic device
Display panel and method for manufacturing the same
Automated system for precision grinding of feedstock
Biasing non-volatile storage to compensate for temperature variations
Method of stitching segments defined by adjacent image patterns during the manufacture of a semiconductor device