Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
On chip timing adjustment in multi-channel fast data transfer










Image Number 6 for United States Patent #8122395.

A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.








 
 
  Recently Added Patents
Motion control system and X-ray measurement apparatus
Maize variety X00C175
Subband SNR correction in a frequency selective scheduler
Managing device functionality during predetermined conditions
Digital image processing device and processing method thereof
Coffee cup stationery tab
Nucleic acid-based tests for prenatal gender determination
  Randomly Featured Patents
Optimization of interconnection networks
Portion of a side of a footwear article
Device for mounting the breaking cone of an inertia crusher
Image projection arrangement with divergent light beams
Foot operated vice
Process for producing unsaturated alcohol
Maintenance of amplified signals using high-voltage-threshold transistors
Remote shock sensing and notification system
Electrophotographic recording material
Jack