Resources Contact Us Home
On chip timing adjustment in multi-channel fast data transfer

Image Number 6 for United States Patent #8122395.

A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.

  Recently Added Patents
Image processing apparatus, image printing apparatus and printing data generation method
Analog to digital converter with increased sub-range resolution
Method, system and computer program product for verifying floating point divide operation results
Method and system for facilitating micropayments in a financial transaction system
Fabrication of thin pellicle beam splitters
Push-up bar
  Randomly Featured Patents
Flexographic printing plate cleaner
Semiconductor device having capacitor with upper electrode whose circumference is made long
Electrostatic charge image developing toner, electrostatic charging image developer, toner cartridge, process cartridge, method of producing electrostatic charge image developing toner, and im
Meter having multi-level user interface
Nucleic acid encoding prion protein variant
Current monitoring apparatus
Decoration lamp string device
Foam composite structure comprising a blend of polypropylene and homogeneous ethylene/alpha-olefin copolymer
Eyelid plaque