Resources Contact Us Home
On chip timing adjustment in multi-channel fast data transfer

Image Number 6 for United States Patent #8122395.

A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.

  Recently Added Patents
Rose plant named `ESM R057`
Pear-shaped convertible reading glasses
Antitumoral compounds
Methods for processing 2Nx2N block with N being positive integer greater than four under intra-prediction mode and related processing circuits thereof
Nuclear fuel assembly bottom nozzle
Wireless communication method, wireless communication system, and mode switching method
Etch resistant clearcoat
  Randomly Featured Patents
System and method providing on-demand generation of specialized executables
Router table
Multilayered dispersed thermochromic liquid crystal
Reproducing objective for video disks
180 kD protein that interacts with protein histidine phosphatase 1
Acrylic resin composition organosiloxane resin composition and laminate comprising the same
Method and apparatus for continuously packaging batches of containers or the like
Formation of inorganic conductive coatings on substrates
Etch process for fabricating a vertical hard mask/conductive pattern profile to improve T-shaped profile for a silicon oxynitride hard mask
Tilting on-off switch