Resources Contact Us Home
On chip timing adjustment in multi-channel fast data transfer

Image Number 6 for United States Patent #8122395.

A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.

  Recently Added Patents
Ethylene polymer having improved resistance against thermooxidative degradation in the presence of liquid fuels comprising biodiesel and oxygen and plastic fuel tank made of it
Pilsner glass
Sprayer device
Extracting apparatus for storage device module
Automated service level management of applications in cloud computing environment
Mobile robot and clinical test apparatus using the same
Lobularia plant named `Inlbusnowhi`
  Randomly Featured Patents
Light source device and projection television
Cannula for arterial and venous bypass cannulation
Governor circuit for universal series (or compound) motor
Gastro-esophageal reflux control system and pump
Liquid ejection head
Detergent composition
3-aminoalkyl-1,3-dihydro-2H-indol-2-one derivatives, preparation thereof and therapeutic use thereof
Reverse conduction protection method and apparatus for a dual power supply driver
System and method for providing an activity schedule of a public person over a network
Touch panel and noise reducing method therefor