Resources Contact Us Home
Video encoding and decoding using parallel processors

Image Number 3 for United States Patent #8121197.

A method is disclosed for the decoding and encoding of a block-based video bit-stream such as MPEG2, H.264-AVC, VC1, or VP6 using a system containing one or more high speed sequential processors, a homogenous array of software configurable general purpose parallel processors, and a high speed memory system to transfer data between processors or processor sets. This disclosure includes a method for load balancing between the two sets of processors.

  Recently Added Patents
Push to release cover for a portable electronic device
Proton conducting electrolytes with cross-linked copolymer additives for use in fuel cells
Method of driving stereoscopic display apparatus and stereoscopic display apparatus
Universal handle extension for unloading butterfly valve for tank trailer or other vehicle
Electronic device
Monofocal photographing lens assembly
Access control method, information display device using the same, and information display system
  Randomly Featured Patents
Self-supporting pneumatic tire
Engine-clutch control interlock system
Fan housing and heat dissipating fan with fan housing
Automatic send to embedded fax/e-mail address
Diagnostic device for measuring biochemical characteristics of microorganisms and the like
Authorizing communications between computing nodes
Method of producing ultrathin-wall seamless metal tube using floating plug
Hair sculpting apparatus and methods
Optical film
Capacitor with zirconium oxide and method for fabricating the same