Resources Contact Us Home
Video encoding and decoding using parallel processors

Image Number 3 for United States Patent #8121197.

A method is disclosed for the decoding and encoding of a block-based video bit-stream such as MPEG2, H.264-AVC, VC1, or VP6 using a system containing one or more high speed sequential processors, a homogenous array of software configurable general purpose parallel processors, and a high speed memory system to transfer data between processors or processor sets. This disclosure includes a method for load balancing between the two sets of processors.

  Recently Added Patents
Disc clamping unit and spindle motor having the same
Capturing effort level by task upon check-in to source control management system
Integer pixel motion estimation system, motion estimation system for quarter-pixel luminance, motion estimation system for quarter-pixel chrominance, motion estimation system for combined lumi
Automated calibration method and system for a diagnostic analyzer
Degradation equalization for a memory
Catheter with laminar flow drug delivery properties
Method for processing video input by detecting if picture of one view is correctly paired with another picture of another view for specific presentation time and related processing apparatus t
  Randomly Featured Patents
Schemaless XML payload generation
Block for sticking natural flowers, branches and the like
Method and apparatus for generating composite images
Apparatus and method for calibrating a computer based model of an attribute of a mobile machine
File management device and electronic equipment
Fluid impelling device and electronic apparatus
Signal cable rewinder with two rewinding discs
Cable steering linkage
Perpendicular magnetic recording write head with milling defined track width
Portable support bracket