Image Number 15 for United States Patent #8119930.
A wiring board 10 comprises a wiring board main body 21 having a dielectric layer 25 that is the first dielectric layer, an electronic component attaching pad 24 having a connection surface 24A with which an electronic component 11 is connected, and disposed inside the dielectric layer 25, a dielectric layer 31 that is the second dielectric layer laminated on the dielectric layer 25, and the via holes 27 and 33 and a wiring pattern 28 provided on the dielectric layers 25 and 31 and electrically connected with the electronic component attaching pad 24, wherein a warp reduction member 22 for reducing a warp of the wiring board main body 21 is disposed inside the dielectric layer 25.
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