Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method of manufacturing a semiconductor device having an active region and dummy patterns










Image Number 15 for United States Patent #8119495.

There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary BL between the element forming region DA and dummy region FA by placing the first dummy pattern DP.sub.1 of relatively wider area and the second dummy pattern DP.sub.2 of relatively small area in the dummy region FA. Thereby, the flatness of the surface of the silicon oxide film embedded within the isolation groove can be improved over the entire part of the dummy region FA. Moreover, an increase of the mask data can be controlled when the first dummy patterns DP.sub.1 occupy a relatively wide region among the dummy region FA.








 
 
  Recently Added Patents
Opioid-nornicotine codrugs combinations for pain management
Color stable manganese-doped phosphors
MOS resistor apparatus and methods
Sink
Antenna module and wireless communication apparatus
Closed cell culture system
Soybean variety XB51J12
  Randomly Featured Patents
Method and apparatus for data transmission in wireless local access network and system therefor
Poly(arylene ether) composition and extruded articles derived therefrom
Waterproof and dustproof switch structure
Electrophotographic process control device using fuzzy logic
Method of manufacturing an automotive sound system
Alarm system
Retention device for turbine blade damper
Soft filled tissue paper with biased surface properties
Red nitride phosphor and production method thereof
Device for protecting magnetic cards and method of making same