Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
High performance capacitors in planar back gates CMOS










Image Number 3 for United States Patent #8119474.

A method of manufacture and device for a dual-gate CMOS structure. The structure includes a first plate in an insulating layer and a second plate above the insulating layer electrically corresponding to the first plate. An isolation structure is between the first plate and the second plate.








 
 
  Recently Added Patents
Code conversion apparatus, code conversion method, and computer product
Methods and compositions related to glucocorticoid receptor antagonists and breast cancer
Motilin-like peptide compound having transmucosal absorbability imparted thereto
Estimating optical characteristics of a camera component using sharpness sweep data
Imidazolidine-2,4-dione derivatives, and use thereof as a cancer drug
Stable aqueous composite compositions
Multicyclic compounds and methods of use thereof
  Randomly Featured Patents
Rapid acquisition, tracking PLL with fast and slow sweep speeds
Anesthesia administration mask and eye shield
Inspection apparatus and measurement method
Method to quantify discrete pore shapes, volumes, and surface areas using confocal profilometry
Air spout device for a ventilating arrangement
T-shaped shielded bus connector
Methods of treating a gaseous mixture of adsorption
Process for preparation of granular stabilizer for chlorine-containing polymers
Power supply which can convert an oscillating voltage into a variable steady state voltage
Lateral coupling of an implantable hearing aid actuator to an auditory component