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Microprocessor memory management










Image Number 12 for United States Patent #8117490.

A memory for an electronic brake control system is divided into portions that are classified as critical and non-critical. Each portion is periodically tested for faults. Upon detection of a fault, the memory is reconfigured with any operations of the brake system associated with a critical memory portion permanently disabled and any operations of the brake system associated with a non-critical memory portion temporarily disabled.








 
 
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