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Image Number 16 for United States Patent #8111184.
A m-bit DAC outputs a voltage that is the result of interpolation from two reference voltages. The two reference voltages are selected, inclusive of redundant selection of the same reference voltage (inclusive also of reference voltages other than adjacent voltages) out of a plurality of reference voltages. The plurality of reference voltages are grouped into first to (3S+1)th groups (where S is a power of 2). An ith group includes [3S(j-1)+i]th reference voltages (where j=1, 2, . . . h, and h is a prescribed integer). The decoder includes (3S+1)th subdecoders, each selecting one voltage responsive to a first MSB group; and a (3S+1)-input and 2-output subdecoder for selecting two voltages, inclusive of redundant selection of the same reference voltage, out of (3S+1) voltages selected by the respective first to (3S+1)th subdecoders, responsive to a LSB group and outputs them to an interpolation amplifier (ratio 1:1).
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