Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Fully-buffered dual in-line memory module with fault correction










Image Number 11 for United States Patent #8103921.

A memory system including a first memory, a content addressable memory, a testing module, and a memory controller. The first memory includes first memory cells. The content addressable memory includes second memory cells and is configured to store addresses of selected ones of the first memory cells, store data having the addresses in corresponding ones of the second memory cells, and retrieve the data from the corresponding ones of the second memory cells. The testing module is configured to determine a number of the first memory cells that fail at a first refresh rate. The first refresh rate corresponds to a time period between refreshing the first memory cells. The memory controller is configured to, based on the number of the first memory cells that fail at the first refresh rate, maintain the first refresh rate, and increase the first refresh rate.








 
 
  Recently Added Patents
Battery pack with interchangeable circuit substrates
Interconnecting virtual domains
Porous polymeric resins
Complete context search system
Lens driving device
Assisting apparatus, method, and program for checking crosstalk noise between hierarchized modules in a semiconductor circuit
Resistor and manufacturing method thereof
  Randomly Featured Patents
Combination hand tool
Hinge for an orthopedic brace having a selectively positionable stop to limit rotation
Hydrogen fuel cell hybrid locomotives
Recombinant herpesvirus of turkeys comprising a foreign DNA inserted into a non-essential region of the herpesvirus of turkeys genome
Lactam derivatives
Method and apparatus for a body fluid sampling device using illumination
Laminated semiconductor wafer, laminated chip package and method of manufacturing the same
Extrusion method
Antibodies capable of specifically identifying haptenic groups, their preparation and their use and to new antigens permitting their preparation
Method for integration of silicide contacts and silicide gate metals