Resources Contact Us Home
Fully-buffered dual in-line memory module with fault correction

Image Number 11 for United States Patent #8103921.

A memory system including a first memory, a content addressable memory, a testing module, and a memory controller. The first memory includes first memory cells. The content addressable memory includes second memory cells and is configured to store addresses of selected ones of the first memory cells, store data having the addresses in corresponding ones of the second memory cells, and retrieve the data from the corresponding ones of the second memory cells. The testing module is configured to determine a number of the first memory cells that fail at a first refresh rate. The first refresh rate corresponds to a time period between refreshing the first memory cells. The memory controller is configured to, based on the number of the first memory cells that fail at the first refresh rate, maintain the first refresh rate, and increase the first refresh rate.

  Recently Added Patents
Method and system for repurposing E-mail correspondence to save paper and ink
Image processing apparatus and image processing method
Methods for treating prostate conditions
Audio encoder, audio decoder, method for encoding an audio information, method for decoding an audio information and computer program using a detection of a group of previously-decoded spectra
Solar cell and manufacturing method thereof
Nitride semiconductor light emitting device and fabrication method thereof
Multi-object appearance-enhanced fusion of camera and range sensor data
  Randomly Featured Patents
Load carrier for power and free conveyor
Universal method and apparatus for testing a valve body for an automatic transmission
Energy curable flexographic inks incorporating grafted pigments
Automatic document conveyance apparatus
Method and apparatus for controlling zipper registration in packaging equipment
Transurethrovesical biopsy, amniocentesis and biological sampling guide
Article die forming method
Wave turbine
Keyboard cover apparatus for electronic keyboard instrument
Method of fabricating semiconductor device