Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Memory device bit line sensing system and method that compensates for bit line resistance variations










Image Number 7 for United States Patent #8102723.

Systems, devices and methods are disclosed, such as a system and method of sensing the voltage on bit lines that, when respective memory cells coupled to the bit lines are being read that compensates for variations in the lengths of the bit lines between the memory cells being read and respective bit line sensing circuits. The system and method may determine the length of the bit lines between the memory cells and the sensing circuits based on a memory address, such as a block address. The system and method then uses the determined length to adjust either a precharge voltage applied to the bit lines or the duration during which the bit lines are discharged by respective memory cells before respective voltages on the bit lines are latched.








 
 
  Recently Added Patents
System to generate an aggregate interest indication with respect to an information item
Integrated ambient light sensor and distance sensor
Hockey puck themed hand clap maraca
Camera body and camera system
Compact wheeled medical equipment stand
Remote control
System, apparatus and method for downlink and uplink grant design in wireless communication systems
  Randomly Featured Patents
Use of anti-strip agents to improve wear characteristics of pavement sealer
Document data structure and method for integrating broadcast television with web pages
Word processor
Serially connected LED lamps control device
Process and system of image processing
Steering lock
Robotic system
Controlling deposits in the calcination of fluxed iron ore pellets
Method of installing a substantially rigid thermoplastic pipe in existing main and lateral conduits
Integrated circuit metal gate structure and method of fabrication