Resources Contact Us Home
System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level

Image Number 5 for United States Patent #8095809.

A method for reducing power consumption, and a system having power reduction capabilities, the method includes: storing, at a first circuit, data representative of a state of a second circuit, entering a low power mode, exiting low power mode, providing a default data value to the second circuit after exiting from the low power mode, and selectively providing data from the first circuit to the second circuit in response to the value of data and to a characteristic of a third circuit coupled to the first and second circuits.

  Recently Added Patents
Catalyst composition comprising shuttling agent for ethylene multi-block copolymer formation
Information display device and program storing medium
Rim for a TV receiver
Closed cell culture system
Security arrangements for extended USB protocol stack of a USB host system
Reverse mapping method and apparatus for form filling
  Randomly Featured Patents
Method and system for a public key cryptosystem having proactive, robust, and recoverable distributed threshold secret sharing
Battery powered lawnmower
Plate making system
Vacuum system using a filter cartridge
Audio signal reproduction apparatus and method
Non-hermetic APD
Compositions that affect suppression of cutaneous delayed hypersensitivity and products including same
Grinding wheel
System and method for coding information on a biosensor test strip
Hockey game table with goal handicap feature