Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method for fabricating integrated circuit including separated diffusion regions of different type each having four gate electrodes with each of two complementary gate electrode pairs formed fr










Image Number 16 for United States Patent #8088681.

A cell layout of a semiconductor device includes a diffusion level layout including a plurality of diffusion region layout shapes, including p-type and n-type diffusion regions separated by a central inactive region. The cell layout also includes a gate electrode level layout for the entire cell defined to include linear-shaped layout features placed to extend in only a first parallel direction. Adjacent linear-shaped layout features that share a common line of extent in the first parallel direction are separated from each other by an end-to-end spacing that is substantially equal and minimized across the gate electrode level layout. Linear-shaped layout features within the gate electrode level layout extend over one or more of the p-type and/or n-type diffusion regions to form PMOS and NMOS transistor devices. A number of the PMOS transistor devices is equal to a number of the NMOS transistor devices in the cell.








 
 
  Recently Added Patents
Power conversion device and method for controlling thereof
High safety vehicular transportation system and operational method thereof
Network client validation of network management frames
Base station synchronization for a single frequency network
Isolation rings for blocking the interface between package components and the respective molding compound
Method, apparatus, and system for energy efficiency and energy conservation including dynamic cache sizing and cache operating voltage management for optimal power performance
Metal halide lamps with fast run-up and methods of operating the same
  Randomly Featured Patents
Footwear system for use in driving
Wheel for a rotating flow machine
Method for the synthesis of (meth)acrylic esters catalysed by a polyol titanate
Method and apparatus for testing an information notification service
Valgus big toe rectifying supporter
Ceramic electronic component
Electrical connector
Double-tuned circuit
Beam forming an expansion seal between two side-by-side grate layers with alternately fixed and mobile bars
Fail-safe engine mount system