Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method for fabricating integrated circuit including separated diffusion regions of different type each having four gate electrodes with each of two complementary gate electrode pairs formed fr










Image Number 16 for United States Patent #8088681.

A cell layout of a semiconductor device includes a diffusion level layout including a plurality of diffusion region layout shapes, including p-type and n-type diffusion regions separated by a central inactive region. The cell layout also includes a gate electrode level layout for the entire cell defined to include linear-shaped layout features placed to extend in only a first parallel direction. Adjacent linear-shaped layout features that share a common line of extent in the first parallel direction are separated from each other by an end-to-end spacing that is substantially equal and minimized across the gate electrode level layout. Linear-shaped layout features within the gate electrode level layout extend over one or more of the p-type and/or n-type diffusion regions to form PMOS and NMOS transistor devices. A number of the PMOS transistor devices is equal to a number of the NMOS transistor devices in the cell.








 
 
  Recently Added Patents
Method, system and computer program product for managing funds in custodial deposit accounts
Polypeptides having beta-glucosidase activity and beta-xylosidase activity and polynucleotides encoding same
Probe for ultrasound diagnostic apparatus
Panel for decoration
Device and method for arranging vials
Carrier for developing electrostatic charge image, developer for developing electrostatic charge image, image forming apparatus, and image forming method
Device and method for adjusting a chrominance signal based on an edge strength
  Randomly Featured Patents
Assay to detect a binding partner
Abrasion-resistant polytetrafluoroethylene tape
Drive means for cylindrical screen printer
Methods for producing multilayer molded articles
Protein containing a scavenger receptor cysteine rich domain
Modular furniture assembly
Pull tab of slider for slide fastener
N-word read/write access achieving double bandwidth without increasing the width of external data I/O bus
Package and method for assembly of infra-red imaging devices
Target backstop using granulated material