Resources Contact Us Home
Method for fabricating integrated circuit including separated diffusion regions of different type each having four gate electrodes with each of two complementary gate electrode pairs formed fr

Image Number 14 for United States Patent #8088681.

A cell layout of a semiconductor device includes a diffusion level layout including a plurality of diffusion region layout shapes, including p-type and n-type diffusion regions separated by a central inactive region. The cell layout also includes a gate electrode level layout for the entire cell defined to include linear-shaped layout features placed to extend in only a first parallel direction. Adjacent linear-shaped layout features that share a common line of extent in the first parallel direction are separated from each other by an end-to-end spacing that is substantially equal and minimized across the gate electrode level layout. Linear-shaped layout features within the gate electrode level layout extend over one or more of the p-type and/or n-type diffusion regions to form PMOS and NMOS transistor devices. A number of the PMOS transistor devices is equal to a number of the NMOS transistor devices in the cell.

  Recently Added Patents
Automatic allocation of data replicas
Organic light-emitting device and display apparatus
Container for testing for micro-organisms
Enhanced manageability in wireless data communication systems
Integrated circuit packaging system with leads and method of manufacturing thereof
Indoor/outdoor cleaning system
Advertisement rotation
  Randomly Featured Patents
Fibers and nonwovens comprising polypropylene blends and mixtures
Input source search support method, and image display apparatus and projector using the search support method
Method of making piston rod for shock absorbers
Therapeutic retroviral vectors for gene therapy
VEGF antagonist formulations for intravitreal administration
Synthetic resin vehicle door outer panel
Method for increasing operation speed in virtual three dimensional (3D) application and operational method thereof
Corn pullulanase
Tank handling and protection structure
Granulator with forced feed assembly