Resources Contact Us Home
Method for planarization of wafer and method for formation of isolation structure in top metal layer

Image Number 12 for United States Patent #8058175.

The invention discloses a planarization method for a wafer having a surface layer with a recess, comprises: forming an etching-resist layer on the surface layer to fill the entire recess; etching the etching-resist layer and the surface layer, till the surface layer outside the recess is flush to or lower than the bottom of the recess, the etching speed of the surface layer being higher than that of the etching-resist layer; removing the etching-resist layer; and etching the surface layer to a predetermined depth. The method can avoid concentric ring recesses on the surface of the wafer resulted from a chemical mechanical polishing (CMP) process in the prior art, and can be used to obtain a wafer surface suitable for optical applications.

  Recently Added Patents
Phase-change memory device having multiple diodes
Automated gate system
Switchable solvents and methods of use thereof
Semiconductor device and method for manufacturing same
Vehicle speed verification system and method
DFPase enzymes from Aplysia californica
Liquid crystal display device
  Randomly Featured Patents
Sleeve for a cooler with spout
Splice closure
Header sheet for image communications system
Light-emitting element including intermediate conductive layer having an electron-injection layer with an island-like structure
System for detecting operability of an airbag squib resistor
Classic toaster
Signature capture/verification systems and methods
Fluidized bed combustion system with steam generation
Triple effect absorption heat exchanger combining second cycle generator and first cycle absorber
Object recognition apparatus, computer readable medium storing object recognition program, and image retrieval service providing method