Resources Contact Us Home
Integrated circuit package system including wafer level spacer

Image Number 6 for United States Patent #8039365.

An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.

  Recently Added Patents
Ion generation using wetted porous material
Multi-band dipole antenna
Method and apparatus for producing homogeneous magnetic fields
Polyurethane resin, toner for developing electrostatic charge image, electrostatic charge image developer, toner cartridge, process cartridge, image forming apparatus, and image forming method
System and method for improving cache efficiency
High productivity single pass scanning system
Method for identifying bacteria in a sample
  Randomly Featured Patents
Pump for liquid chromatograph analyzer
Supersonic diffuser
Pyrazolopyridinyl pyrimidine therapeutic compounds
Wire bonded semiconductor device having low inductance and noise
Method for stacked contact with low aspect ratio
Apparatus having a compact mechanism for moving the sliding cover of a cassette
Method and system for object replication in a content management system
Integrated muffler structure for compressors
Apparatus for reducing change in timbre at each point where tone ranges are switched