Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches










Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.








 
 
  Recently Added Patents
Image reading apparatus, image reading method and program
Valved, microwell cell-culture device and method
Method for detecting motion of an electrical device or apparatus
Materials and methods for stress reduction in semiconductor wafer passivation layers
Cineole
Heat retaining device
Method and system for reduction of quantization-induced block-discontinuities and general purpose audio codec
  Randomly Featured Patents
Speaker
Tankless electric water heater with staged heating element energization
Method of impregnating wood with plastics
Bath products containing menthyl lactate
Method of reducing polluting emissions from circulating fluidized bed combustion intallations
Electric coffee maker with warming plate having adjustable heat output to prevent overheating
Safety glove bag
Furniture
Water craft
Interconnection substrate, semiconductor chip package including the same, and display system including the same