Resources Contact Us Home
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches

Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.

  Recently Added Patents
Memory management configuration
Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region
Cathode material for lithium ion secondary battery and lithium ion secondary battery using it
Flame-proofed thermoplastic compositions
System and method for confirming delivery of an electronic message
Piano keyboard with key touch point detection
Integrated circuit devices having conductive structures with different cross sections
  Randomly Featured Patents
Thumb wrestling game apparatus with stabilizing handle
Animal feeding and monitoring system
Method and apparatus for updating state data
Fluid mixer
Process for the production of aziridines
Thermosetting resinous molding compositions
Incorporation of biological molecules into bioactive glasses
HIV protease inhibitors
Interactive two-way transfer multimedia messaging service method