Resources Contact Us Home
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches

Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.

  Recently Added Patents
Lead with braided reinforcement
System and method for fabrication of fibers using links of nanotubes
Methods for data acquisition systems in real time applications
Supporting role-based access control in component-based software systems
Orally dispersible tablet
Image forming device
LED lamp
  Randomly Featured Patents
Door edge guard
Thermally developable light-sensitive materials
Modular rotary cutterbar
Poker game having sequential hands with increasing numbers of cards
Horizontally structured CAD/CAM coordinate system for manufacturing design
Non-toxic strain of Fusarium graminearum
Coin acceptor or similar article
Temperature monitoring system
Pro-active access handling in a multi-access network environment
Novel macromolecular material for use in realizing electrolytes and/or electrodes