Resources Contact Us Home
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches

Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.

  Recently Added Patents
Methods and systems for automatically identifying a logical circuit failure in a data network
Determining system for localization methods combination
Information terminal, setting information distribution server, right information distribution server, network connection setting program and method
System and method for combined I/Q generation and selective phase interpolation
Sheet coil type resolver
Programmable computer mouse
Display module
  Randomly Featured Patents
Tray for a garden watering set
Level sensor system
Sprocket with replaceable wear-absorbing inserts
Fuel injection control apparatus and method for an internal combustion engine
Cellular extension service using single line and multiple cellular telephone sets
Closed loop power control for TDMA links
Control method and control apparatus
Data processing system with reorganization of disk storage for improved paging
System and method for providing wireless local area networks as a service
Developer mixing and transporting auger for magnetic brush developing apparatus