Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches










Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.








 
 
  Recently Added Patents
Display screen with graphical user interface
Secure access to customer log data in a multi-tenant environment
System and method to assess and report the health of landing gear related components
Automobile body
Television apparatus
Fringe field switching mode liquid crystal display panel
Baseball player stationery tab
  Randomly Featured Patents
Preparation of aromatic aldehydes
Large aperture zoom lens
Process to decrease or eliminate corrosion from the decomposition of halide containing olefin catalysts
Method of forming porous diamond films for semiconductor applications
Handle for culinary tools or the like
Combined hot air drying and fan unit for use on a printing press
Method of determining if deterioration in structural integrity of a pressure vessel, a pressure vessel, and a structural integrity testing apparatus therefor
Tire tread
Data processing method and apparatus, recording medium, reproducing method and apparatus
Bolt knife assembly with locking member