Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Dual-mode based digital background calibration of pipelined ADCs for gain variations and device mismatches










Image Number 7 for United States Patent #8031092.

Methods and systems are described relating to dual-mode based digital background calibration of pipelined ADCs, for gain variations and device mismatches. Errors caused by gain insufficiency, nonlinearity, and capacitor mismatches are corrected by operating one ADC in two circuit configurations. These two modes are so arranged that their digital outputs differ in the presence of gain nonlinearity, gain insufficiency, and capacitor mismatches. The output difference is measured by randomly choosing one of the two operation modes at each sampling clock and digitally correlating the resulting digital output sequence. The measured output difference, which represents ADC errors, is used to remove the errors.








 
 
  Recently Added Patents
Preservation of liquid foods
Stock analysis method, computer program product, and computer-readable recording medium
Light-emitting diode package and method for manufacturing the same
Power consumption management in a MIMO transceiver and method for use therewith
Systems and methods for redox flow battery scalable modular reactant storage
Business flow processing method and apparatus
Motion control system and X-ray measurement apparatus
  Randomly Featured Patents
Apparatus for monitoring liquid flow rates
Sheet beam-type inspection apparatus
Preparation of heterodimeric PDGF-AB using a bicistronic vector system in mammalian cells
System and method of organizing data to facilitate access and streaming
Circuit for monitoring contact between the resistance track and the wiper of a potentiometer
Cleaning device for a shaving apparatus
Polymer mixture for flexible sheets
Data adaptive interference suppression
Sheet inspection method and apparatus having retroreflecting means
Backplane assembly with ejection mechanism