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Accelerated image registration by means of parallel processors

Image Number 3 for United States Patent #8023732.

A method is provided for accelerating non-rigid image registration, using parallel processors. To that end, on a commercially available graphics card, a block-matching algorithm is implemented, which, by histogram-based similarity standards, calculates the motion vectors for individual blocks. All the blocks are processed simultaneously and individually. The complete motion vector field is obtained by bilinear interpolation. Optimized search methods, such as conjugate direction searching, are employed. The algorithm terminates once the optimal displacement has been found for all the blocks. The registration is done completely on the graphics card. The algorithm is fully automatic, precise, and fast. The program may be employed for instance in registration for digital subtraction angiography.

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