Resources Contact Us Home
Method for manufacturing dual gate in semiconductor device

Image Number 2 for United States Patent #7989281.

Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.

  Recently Added Patents
Signal transfer apparatus
Buffering stop structure and corresponding packing case
Reconfigurable barrel shifter and rotator
Wireless communication system and wireless communication method
Method and system for generating and displaying an interactive dynamic graph view of multiply connected objects
  Randomly Featured Patents
Method and apparatus for simulated direct frame buffer access for graphics adapters
Dead front interlocked receptacle
Method for amortizing authentication overhead
Multi-modality electrical separator apparatus and method
Antibodies that bind to .alpha.2-antiplasmin crosslinked to fibrin which do not inhibit plasma .alpha.2-antiplasmin
Wide band biconical antenna with a helical feed system
Sag resistant mortar compositions
Internal combustion engine with exhaust gas recycling system
Techniques for efficient mass storage layout optimization
Process for the preparation of copolyarylene sulphides with reduced crystallization temperature