Resources Contact Us Home
Semiconductor wafer including cracking stopper structure and method of forming the same

Image Number 7 for United States Patent #7977232.

A semiconductor wafer may include, but is not limited to, the following elements. A semiconductor substrate has a device region and a dicing region. A stack of inter-layer insulators may extend over the device region and the dicing region. Multi-level interconnections may be disposed in the stack of inter-layer insulators. The multi-level interconnections may extend in the device region. An electrode layer may be disposed over the stack of inter-layer insulators. The electrode layer may extend in the device region. The electrode layer may cover the multi-level interconnections. A cracking stopper groove may be disposed in the dicing region. The cracking stopper groove may be positioned outside the device region.

  Recently Added Patents
Synchronization processing circuit and synchronization processing method in wireless communication system
Compound semiconductor epitaxial structure and method for fabricating the same
Multiplexing channels by a medium access controller
Systems and methods for providing power and data to lighting devices
ZnO green luminescent material and its preparation
Image forming apparatus and system connectable with an authorization apparatus via a communications network, the image forming apparatus comprising an apparatus control section, an initial inq
Contact detection between a disk and magnetic head
  Randomly Featured Patents
Hypertonic reduction of chilling injury
Housing structure for coupling and releasing optical modules
Machine position detecting apparatus
Method and detector for detecting a flame
Through-silicon vias for semicondcutor substrate and method of manufacture
Fixed quantity feed apparatus for bean sprouts
Dispenser for granular and powdered dry materials
Self-supporting impact resistant laminate
Dampened retractable furniture cup holder
Magnet assembly for removing ferrous metal particles from fluids