Resources Contact Us Home
Semiconductor wafer including cracking stopper structure and method of forming the same

Image Number 7 for United States Patent #7977232.

A semiconductor wafer may include, but is not limited to, the following elements. A semiconductor substrate has a device region and a dicing region. A stack of inter-layer insulators may extend over the device region and the dicing region. Multi-level interconnections may be disposed in the stack of inter-layer insulators. The multi-level interconnections may extend in the device region. An electrode layer may be disposed over the stack of inter-layer insulators. The electrode layer may extend in the device region. The electrode layer may cover the multi-level interconnections. A cracking stopper groove may be disposed in the dicing region. The cracking stopper groove may be positioned outside the device region.

  Recently Added Patents
Reception method and reception apparatus
Method of improving sensitivity and interference rejection in wireless receivers
CMOS image sensor
Context data in UPNP service information
Canine iPS cells and method of producing same
Method for the hydrolysis of substituted formylamines into substituted amines
Method and system for dynamic digital rights bundling
  Randomly Featured Patents
Reflective bilateral liquid crystal device and electronic apparatus
Filter for fluid passage
Composite heat shield
Gas phase polymerization process
Annular speed sensor with strain relief
Shell for the pushing handle of a trolley
Method of manufacturing semiconductor device having stress creating layer
Fiber optic holder
Process for the preparation of anti-ischemic and anti-hypertensive drug amlodipine besylate