Resources Contact Us Home
Chipstack package and manufacturing method thereof

Image Number 6 for United States Patent #7977156.

A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.

  Recently Added Patents
Humidity indicator and method for fabricating the same
Organic elelectroluminescent display
Herbal composition for the treatment of wound healing, a regenerative medicine
Communication device and method for detecting a radio signal
Passive millimeter wave differential interference contrast polarimetry
Pizza stone
Performance monitoring of advanced process control systems
  Randomly Featured Patents
Thin film magnetic heads
Screw provided with self-locking thread
Optimization of bioleaching process
Roebel winding with conductive felt
Dewatering of sewage sludges on chamber filter presses
Manufacturing method for a thin film magnetic head having fine crystal grain coil
Lead feldspar glass-ceramic bodies
Grille for a speaker housing
Unwinding instrumented program code
Floral sleeve convertible into a decorative skirt