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Power-on reset circuit and electronic device using the same

Image Number 7 for United States Patent #7924070.

A power-on reset circuit, connected to an external direct current (DC) power source, to receive DC power signals and generate a reset signal, includes a delay circuit, a combination circuit and a shaping circuit. The delay circuit comprises a plurality of delay units, to delay the received DC power signals and output a plurality of delayed DC power signals. The combination circuit is connected to the delay circuit, to combine the delayed DC power signals into a combination signal, and output the combination signal. The shaping circuit is connected to and turns the combination circuit on and off according to the combination signal and outputs the reset signal.

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