Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 2 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Multiple input multiple output transceiver
Device for accurately measuring concentration of component in blood and control method of the device
Solid-state imaging device
Automated synchronization of design features in disparate code components using type differencing
Systems and methods for mitigating spectral regrowth from non-linear systems
Process for the enzymatic reduction of enoates
  Randomly Featured Patents
Gaming device having main game activating a bonus event
Method for the production of poly-o-hydroxyamides
Stable loratadine spill resistant formulation
Vehicle hydraulic system
Ground anchors
Collapsible RJ11/RJ45 connector for type II PC card extension cord application
Information processing apparatus, image-capturing system, reproduction control method, recording control method, and program
Suspended sphere novelty
Developer station for a laser printer
Data transmission method