Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 2 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Implementing state-of-the-art gate transistor, sidewall profile/angle control by tuning gate etch process recipe parameters
Data communication apparatus, method of controlling the same, program, and storage medium
Display screen or portion thereof with graphical user interface
Computer program and apparatus for evaluating signal propagation delays
Image processing apparatus and image processing method
Detection and use of low molecular-weight modulators of the cold-menthol receptor TRPM8
Apparatus and method for scrolling a screen of a portable terminal having a touch screen
  Randomly Featured Patents
Heated valve for operation in freezing conditions
Apparatus and method for tracing microprocessor instructions
Setting tool for expanding wall anchors
Method for transferring data, and a computer system
Metal plated aromatic polyimide film
Chimeric adenoviral coat protein and methods of using same
Method and relate apparatus for enhancing transmission efficiency in a transmitter of a wireless communication system
Purification of acetic acid
Three-dimensional photography using incoherent light
Growth inhibitor for cariogenic bacteria