Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 2 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Process for preparing higher hydridosilanes
Light irradiation element, image forming structure, and image forming apparatus
Imaging lens having five lens elements, and electronic apparatus having the same
Timing controller capable of removing surge signal and display apparatus including the same
Active pellet without chemical additives
Decentralized processing network
Inductive signal transfer system for computing devices
  Randomly Featured Patents
Urgent communications that overcome receiving device impediments
Process and device for bending and tempering by contact
Sheet pile delivery for printing presses
Rack with spotlights
Pressure-sensitive verification system and use thereof
Flash memory with plural memory chips of same memory capacity and system utilizing the same
Apparatus for use in determining meat tenderness
High-brightness diffusion plate with trapezoid lens
Centrifuge strobe lamp holder