Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Systems and methods for reduced complexity LDPC decoding










Image Number 2 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.








 
 
  Recently Added Patents
Semiconductor memory device
Printing system, information processing apparatus, print job processing method, information processing method, program, and storage medium
Camera system, video processing apparatus, and camera apparatus
Security authentication method, apparatus, and system
Signal judgment method, signal judgment apparatus, program, and signal judgment system
Distributed mobile access point acquisition
Method and apparatus for detection of the remote origin fraction of radon present in a measuring site
  Randomly Featured Patents
Master-slice-type semiconductor integrated circuit device
Method and structure for implementing a resistor ladder
Louvre control system
Sensor membrane of an optical sensor
Microelectronic assembly for connection to an embedded electrical element, and method for forming same
Pattern formation method
Perfuming or flavoring microcapsules comprising a fireproofing agent
Apparatus and method for propelling and retrieving a disk
Solenoid actuated valve assembly
Color generation using multiple illuminant types