Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 15 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Heap/stack guard pages using a wakeup unit
Magnetic reading and writing device
Negative active material for a rechargeable lithium battery, a method of preparing the same, and a rechargeable lithium battery comprising the same
Method of isolating human neuroepithelial precursor cells from human fetal tissue
Multi-contoured yoga support
Bullet lens design for the dasal seeker
Position and orientation measurement apparatus, position and orientation measurement method, and storage medium
  Randomly Featured Patents
Circuit pack system with semi-or fully-automatic upgrade capability
Hub for winding magnetic tapes
Trench clean-out shovel
Fluid separator
Contact probes
Infant drinking cup
Necklace pendant circlet
Glass panel
Optical transfer system having a transmitter and a receiver
Conjugated polymer exciplexes and applications thereof