Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 14 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Method of generating integrated circuit model
Integrated testing circuitry for high-frequency receiver integrated circuits
Electrode structure and its manufacturing method, and semiconductor module
Device, information processing method, and computer-readable storage medium
System of providing an internet web site that assists medical professionals draft a letter of medical necessity or other documentation for transmission to a third party payer on behalf of a pa
Method and system for acquiring support capability of mobile terminal by base station side system
Nonvolatile memory device
  Randomly Featured Patents
Lithographic apparatus and device manufacturing method
Antivibration zoom lens
Method of welding aluminum drive shaft components
Aquarium pump
Vent assembly and method of making same
Sulfonation of lignins
Electrically heated reservoir having a preassembled plural tube continuous flow heating unit
Electronically controlled warmer drawer
Silane substituted polyalkylene oxide reagents and methods of using for preventing or reducin aluminosilicate scale in industrial processes
Workbench holder system