Resources Contact Us Home
Systems and methods for reduced complexity LDPC decoding

Image Number 14 for United States Patent #7895500.

Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.

  Recently Added Patents
Image capture and identification system and process
Information display device and program storing medium
Magnetic memory element, driving method for same, and nonvolatile storage device
Output queued switch with a parallel shared memory, and method of operating same
TC-83-derived alphavirus vectors, particles and methods
Lateral double diffused metal oxide semiconductor device and method of manufacturing the same
Polymer bonded fibrous coating on dipped rubber articles skin contacting external surface
  Randomly Featured Patents
N,N'-Bis[substituted-1,2,3,4-tetrahydroisoquinolinolyl]disulfonylimides and antiallergic compositions and method of use
Golf practice system
Method and composition for inhibition of angiogenesis using antagonists based on MMP-9 and .beta.1 integrins
Polymide for high-temperature adhesive
Method and apparatus for providing a service for sharing a printing environment
Method of fabricating a micro-electromechanical systems device
Hub for wheel and wheel being equipped with said hub
Water closet
Ion selective electrode
Method and a tool for estimating probability of data contention in a multi-processor shared-memory system