Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Flash memory gate structure for widened lithography window










Image Number 15 for United States Patent #7888729.

A first portion of a semiconductor substrate belonging to a flash memory device region is recessed to a recess depth to form a recessed region, while a second portion of the semiconductor substrate belonging to a logic device region is protected with a masking layer. A first gate dielectric layer and a first gate conductor layer formed within the recessed region such that the first gate conductive layer is substantially coplanar with the top surfaces of the shallow trench isolation structures. A second gate dielectric layer, a second gate conductor layer, and a gate cap hard mask layer, each having a planar top surface, is subsequently patterned. The pattern of the gate structure in the flash memory device region is transferred into the first gate conductor layer and the first gate dielectric layer to form a floating gate and a first gate dielectric, respectively.








 
 
  Recently Added Patents
Circuits for prevention of reverse leakage in V.sub.th-cancellation charge pumps
Connector with shielding device and method for manufacturing connector
Fixing apparatus
Image processing apparatus, remote management system, license update method, and computer program product
Non-aqueous electrolyte battery
Landscape post for solar and other light fixtures
Shoe
  Randomly Featured Patents
Aluminum shearing apparatus
Data processing system for pricing, costing and billing of financial transactions
Ink jet recording head and apparatus in which recording is controlled in accordance with calculations involving a measured resistance
Triazolo and tetrazolo pyrimidine derivatives as HNE inhibitors for treating COPD
ATM throttling
Checkerboard deep trench dynamic random access memory cell array layout
Method for actively managing central queue buffer allocation
Heating treatment device, heating treatment method and fabrication method of semiconductor device
Substrate treatment apparatus
Landing gear assembly for a trailer