Resources Contact Us Home
Flash memory gate structure for widened lithography window

Image Number 15 for United States Patent #7888729.

A first portion of a semiconductor substrate belonging to a flash memory device region is recessed to a recess depth to form a recessed region, while a second portion of the semiconductor substrate belonging to a logic device region is protected with a masking layer. A first gate dielectric layer and a first gate conductor layer formed within the recessed region such that the first gate conductive layer is substantially coplanar with the top surfaces of the shallow trench isolation structures. A second gate dielectric layer, a second gate conductor layer, and a gate cap hard mask layer, each having a planar top surface, is subsequently patterned. The pattern of the gate structure in the flash memory device region is transferred into the first gate conductor layer and the first gate dielectric layer to form a floating gate and a first gate dielectric, respectively.

  Recently Added Patents
Content output control device and content output control method
Printer driver, printer control method, and recording medium
Semiconductor device and method of manufacturing the same
Liquid crystal panel and liquid crystal display
Coreference resolution in an ambiguity-sensitive natural language processing system
Devices and methods for the production of coaxial microfibers and nanofibers
Fixture for camera attachments
  Randomly Featured Patents
Protection of catalysts by deposition of a protective layer
Storage container with interlocking corner members
Controllable power semiconductor component
In situ recovery from a kerogen and liquid hydrocarbon containing formation
Process for adhering aramid polymers
4-hydroxy-2-cyclopentenone derivatives and anticancer agent and bone formation accelerator containing the same
Rotary air bearing head with leading edge controlling air bearing
Modular binder system
Bi-directional step-over tape applicator head
Matching a user to a conversation