Resources Contact Us Home
Flash memory gate structure for widened lithography window

Image Number 15 for United States Patent #7888729.

A first portion of a semiconductor substrate belonging to a flash memory device region is recessed to a recess depth to form a recessed region, while a second portion of the semiconductor substrate belonging to a logic device region is protected with a masking layer. A first gate dielectric layer and a first gate conductor layer formed within the recessed region such that the first gate conductive layer is substantially coplanar with the top surfaces of the shallow trench isolation structures. A second gate dielectric layer, a second gate conductor layer, and a gate cap hard mask layer, each having a planar top surface, is subsequently patterned. The pattern of the gate structure in the flash memory device region is transferred into the first gate conductor layer and the first gate dielectric layer to form a floating gate and a first gate dielectric, respectively.

  Recently Added Patents
Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufacture
System for hot-start amplification via a multiple emulsion
Sealed, waterproof digital electronic camera system and method of fabricating same
Caprazene as a novel compound and derivatives thereof, and caprazol as a novel compound and derivatives thereof
Packet bundling at the PDCP layer
Round carrying case
Method and apparatus for connecting to external device
  Randomly Featured Patents
Image forming apparatus having a photosenstive member of high capacitance
Method for focus control
Transmissions of vehicles equipped with electric retarders
Circular polarization generating system for microwave oven
Collapsible input device
Pulse generator for reactive loads
Production of cosmetic lenses
Connector socket
Apron with a bendable pocket-forming device
Push-fit shield