Resources Contact Us Home
Low threshold voltage semiconductor device with dual threshold voltage control means

Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.

  Recently Added Patents
Optoelectronic component and method for producing an optoelectronic component
Defensin polynucleotides and methods of use
Method of requesting CQI reports
Harmonic sensor
Method and apparatus for re-routing calls in a packet network during failures
Semiconductor device and method for fabricating the same
Image erasing apparatus and recording medium conveying method for image erasing apparatus
  Randomly Featured Patents
Creating layout for integrated circuit structures
Oxide bulk superconducting current limiting element current
Golf putter head
Optical detection of alignment and/or absence of tape cartridge leader pin
Contraception and prophylaxis enhancement system
Derivatives of N-phenylpyrazoles
Ergonomic crutch
Current-limiting thin film termination for capacitors
Gimbal assembly for monopulse radar antenna
Friction compensation in a minimally invasive surgical apparatus