Resources Contact Us Home
Low threshold voltage semiconductor device with dual threshold voltage control means

Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.

  Recently Added Patents
Method and system for monitoring and treating hemodynamic parameters
Timing controller capable of removing surge signal and display apparatus including the same
Aqueous composition with agents to inhibit water evaporation
Automated pizza preparation and vending system
Device and method for adjusting a chrominance signal based on an edge strength
Sheet coil type resolver
Charged particle beam apparatus
  Randomly Featured Patents
Arthropod maturation inhibitors
Laser device for gynecology
Rounding computing method and computing device therefor
Imidized surface protection for maleic anhydride interpolymer articles
Benzimidazoles as 5-lipoxygenase inhibitors
Ink-on-demand type ink jet head driving circuit
Testing circuit and method for a codec hybrid balance network
Multiple cartridge dispensing system
Seismonastic switches with inertia responsive controller
Spinal column orthesis