Resources Contact Us Home
Low threshold voltage semiconductor device with dual threshold voltage control means

Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.

  Recently Added Patents
Server system and method for discovering digital assets in enterprise information systems
Managing multiple web services on a single device
System and method for selecting a video encoding format based on feedback data
Method and apparatus for controlling a multi-node process
Illumination unit for a direct-view display
System and method of automatic piloting for in-flight refuelling of aircraft, and aircraft comprising said system
Motor with power-generation coil module
  Randomly Featured Patents
Recording medium, recording method, and recorder
Fabric filter dewatering tube for collecting sediment
Cargo-transfer apparatus and method
Retractable shoe cleaner
Medical and surgical laser probe I
Electrochromic system
Arrangement for sealing off a gap between a first component and a second component
Method and apparatus for reducing emissions of internal combustion engines
Printable identification band with top strip for RFID chip attachment
Belt conveyors and methods for conveyed products undergoing a thermal treatment