Resources Contact Us Home
Low threshold voltage semiconductor device with dual threshold voltage control means

Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.

  Recently Added Patents
Method and system for verifying content authenticity in smart TV
Vaccine against group A beta hemolytic streptococcus and respective process for obtaining thereof
Electromagnetic-type touch input device, and touch display device incorporating the same
Method and apparatus for providing collaborative viewing of a media stream
Hydraulic variator control arrangement
Combined shirt and smock
  Randomly Featured Patents
Apparatus and method for producing picture data based on two-dimensional and three dimensional picture data producing instructions
Highly alternating ethylene styrene interpolymers
Cermet and process for producing it
Vehicular headlamp
Automatic cooking appliance employing a neural network for cooking control
Constructing Markov model word baseforms from multiple utterances by concatenating model sequences for word segments
Reflective diffraction grating for use in display devices
Generating a gray code for an odd length sequence using a virtual space
Scented cleaner for guns
Endotracheal tube holder