Resources Contact Us Home
Low threshold voltage semiconductor device with dual threshold voltage control means

Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.

  Recently Added Patents
Method for maintaining a driver-independent braking intervention after a collision
RFID reader revocation checking using low power attached displays
Plants and seeds of hybrid corn variety CH717591
Plasma doping method and plasma doping apparatus
Correlating trace data streams
Method and apparatus for filter-less class D audio amplifier EMI reduction
Eyeglass component
  Randomly Featured Patents
Freewheel clutch
Communication protocol for controlling transfer of temporal data over a bus between devices in synchronization with a periodic reference signal
Pulse generator independent of supply voltage
Light emitting diode package structure and lead frame structure thereof
Gap filler for bed
Optical amplification method and device usable with bands other than the C-band
Systems and methods for testing a biological sample
Telephone outlet receptacle plate
Tacking device
Object made of glass