Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Low threshold voltage semiconductor device with dual threshold voltage control means










Image Number 4 for United States Patent #7858500.

A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO.sub.2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other means contemplated in the present invention include, for example, utilizing an insulating interlayer atop the dielectric for charge fixing and/or by forming an engineered channel region. The present invention also relates to a method of fabricating such a CMOS structure.








 
 
  Recently Added Patents
Oral care implement accessory
Use of a high-oleic and high-tocol diet in combination with a non-tocol antioxidant for improving animal meat quality
Intake parameter-calculating device for internal combustion engine and method of calculating intake parameter
Methods and systems for determining the reliability of transaction
Method for dynamic multi-level pricing for wireless communications according to quality of service
Global alignment for high-dynamic range image generation
System and method for converting biomass to ethanol via syngas
  Randomly Featured Patents
Liquid crystal display device
Protective relay apparatus for detecting high-impedance ground faults
Catalytic combustion apparatus
Game board
Clutch release bearing device
Horn antenna array
Transceiver duplex filter utilizing saw filter
Method of wiring for power supply to large-scale integrated circuit
Solid component of catalyst for the (CO)polymerization of ethylene
Apparatus and methods for facilitating installation of conduit systems