Image Number 8 for United States Patent #7856464.
A system and method for decimating a digital signal is disclosed. The system includes an input to receive digital data, a control input to receive a desired decimation rate, and an integrator stage responsive to the input. The system also includes a variable rate down sampling module responsive to the integrator stage and a differentiator stage responsive to the variable rate down sampling module. The down sampling module has a decimation rate that is dynamically adjustable based on the desired decimation rate.