Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Failsafe and tolerant driver architecture and method










Image Number 3 for United States Patent #7834653.

A method includes controllably utilizing a control signal generated by an Input/Output (IO) core to isolate a current path from an external voltage supplied through an IO pad to a supply voltage by transmitting a same voltage at an input terminal of a transistor, configured to be part of a number of cascaded transistors of an IO driver of an interface circuit, to an output terminal thereof during a failsafe mode of operation and a tolerant mode of operation. The method also includes feeding back an appropriate voltage to a floating node created by the isolation of the current path, and controlling a voltage across each transistor of the number of cascaded transistors to be within an upper tolerable limit thereof through an application of a gate voltage to each transistor derived from the supply voltage or the external voltage supplied through the IO pad.








 
 
  Recently Added Patents
Wind driven generator for vehicles
Controller for soldering iron
Character input device and program for displaying next word candidates based on the candidates' usage history
Real-time pricing of shipping vendors
Method and apparatus of communication using soft decision
Electronic device with a screen
Lead frame array package with flip chip die attach
  Randomly Featured Patents
Can decorating apparatus
Graft copolymers of polymerizable monomers and olefin/carbon monoxide copolymers
Production of trinitromethane
Method of diagnosing and monitoring malignant breast carcinomas
Process for the manufacture of dihydrocitral
Charging control apparatus for vehicle
Packaging structure and method for automotive components
Wheel rim having a tire sensor for a pneumatic tire
Installation for the storage of gas, especially natural gas
Detection of clogged filter in an HVAC system