Resources Contact Us Home
Method of fabricating an integrated circuit

Image Number 15 for United States Patent #7759242.

A method of fabricating an integrated circuit, including the steps of forming a first mask layer in the form of a hard mask layer including a plurality of first openings and a second mask layer with at least one second opening which at least partially overlaps with one of the first openings, wherein the at least one second opening is generated lithographically; and at least two neighboring first openings are distanced from each other with a center to center pitch smaller than the resolution limit of the lithography used for generating the second opening.

  Recently Added Patents
Methods and systems for identifying and changing resolutions to cause an aspect ratio of a printed image to match an aspect ratio of image data
Translation system adapted for query translation via a reranking framework
Method and apparatus for focusing electrical stimulation in the brain during electro-convulsive therapy
Gestures for presentation of different views of a system diagram
Selection of a suitable node to host a virtual machine in an environment containing a large number of nodes
Soliciting first party in communication session to maintain call when degradation of connection to second party is anticipated
Method for producing vinyl acetate monomer
  Randomly Featured Patents
Method and system for pre-deployment conflict checking
Tool assembly
Catalyst for the hydroconversion of heavy hydrocarbons
Method and circuit for detecting a spurious lock signal from a lock detect circuit
Method, product, and apparatus for requesting a network resource
Dark field illuminator and collector apparatus and method
Electrical connector assembly
Two plate reverse firing electromagnetic ink jet printing mechanism
Integral earth anchor
Process for the manufacture of polycrystalline garnet and corresponding monocrystals