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Image Number 16 for United States Patent #7755531.
An analog reference voltage generator for generating a monotonously increasing or decreasing analog reference voltage includes a plurality of dump cells in front of an operational amplifier and controls the dump cells using a plurality of clock signals, respectively, which do not overlap each other in time, thereby increasing a ramping speed. The analog reference voltage generator including the plurality of dump cells controls the generation of an analog reference voltage using the plurality of clock signals obtained by dividing a master clock signal, thereby preventing the voltage level of the reference signal from decreasing due to an increase of the load.
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