Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
IP network node and middleware for establishing connectivity to both the IPv4 and IPv6 networks










Image Number 4 for United States Patent #7657642.

An Internet Protocol (IP) network node attempts to establish and maintain connectivity to both the Internet Protocol version 4 (IPv4) and Internet Protocol version 6 (IPv6) networks on initialization of one of the operating system and a program application. The IP node includes program instructions for determining IP addresses of all network interfaces associated with the node; program instructions for identifying all usable Internet protocols available on the node; program instructions for determining whether one of IPv4 and IPv6 are usable for communications with other IP nodes; and program instructions for establishing a tunnel through one of the IPv4 and IPv6 networks to a gateway for the other of IPv4 an IPv6 networks if the program instructions determine that either one of the IPv4 and IPv6 networks are not usable for communications with the other IP nodes.








 
 
  Recently Added Patents
Semiconductor device, semiconductor device design method, semiconductor design apparatus, and program
Process for preparing synthetic intermediates of peripherally-selective inhibitors of dopamine-.beta.-hydroxylase involving catalytic asymmetric hydrogenation
Placental tissue grafts
System and method for internet based procurement of goods and services
Peptide vectors
Alternate source programming
Semiconductor device and method for manufacturing the same
  Randomly Featured Patents
Oxadiazole derivatives as sphingosine 1-phosphate (S1P) receptor modulators
Charge-coupled imaging device camera provided with such an imaging device
Cosmetic or dermatological use of peptides for promoting adhesion between skin cells
Correction of higher order aberrations in intraocular lenses
Solid detergent and chemical dispenser
Parking assisting apparatus
Wire grip
Sputtering apparatus and method for forming coating film by sputtering
Wafer test trigger signal generating circuit of a semiconductor memory apparatus, and a wafer test circuit using the same
Lighted cabinet assembly