Resources Contact Us Home
Dual gate structure for imagers and method of formation

Image Number 3 for United States Patent #7635624.

A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an imager in which pixels in an array includes a capacitor and readout circuitry with NMOS transistors. Periphery circuitry around the array can include PMOS transistors. Because the silicide layer is formed after the conductive layers, it is not exposed to high temperatures and, therefore, migration and cross-contamination of dopants is reduced.

  Recently Added Patents
Vaccine composition against Streptococcus pyogenes
Method for playing digital media files with a digital media player using a plurality of playlists
Wireless communication method, wireless communication system, and mode switching method
Method and system for the assignment of security group information using a proxy
Measurement protocol for a medical technology apparatus
Authentication method
Data encoding and decoding apparatus and method thereof for verifying data integrity
  Randomly Featured Patents
Method and apparatus for optical imaging of retinal function
Paintball gun having internal pressure regulator
Computer network and method for changing the pay schedules of gaming devices
Acyl- or acyloxymethyl-allopurinol prodrugs
Ultra low jitter clock generation device and method for storage drive and radio frequency systems
Means for heating and cooling a truck cab
Transducer for engine fuel injection monitoring
Testing of cigarettes
Transfer cart with improved base and gate guides
Collapsible corrugated paper form void