Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Dual gate structure for imagers and method of formation










Image Number 3 for United States Patent #7635624.

A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an imager in which pixels in an array includes a capacitor and readout circuitry with NMOS transistors. Periphery circuitry around the array can include PMOS transistors. Because the silicide layer is formed after the conductive layers, it is not exposed to high temperatures and, therefore, migration and cross-contamination of dopants is reduced.








 
 
  Recently Added Patents
Devices including composite thermal capacitors
Technique for manufacturing bit patterned media
Thin film transistor and flat panel display device including the same
Spectral sensor for checking documents of value
System and methods for facilitating and documenting user thinking and learning using enhanced interactive constructs
Cooler
Compositions and methods for concentrating and depleting microorganisms
  Randomly Featured Patents
Sealing body for longitudinally split cable fittings
Programmable data reformat system
Optical adder for optical attenuation
Method for preventing latch-up in cmos integrated circuit devices
Well completion method and apparatus
Method and apparatus for providing a utility-based model for security software revenue generation
Image reading method for an image recording system
Controlled release laundry bleach product
Magnifier
Mental disorders