Resources Contact Us Home
Dual gate structure for imagers and method of formation

Image Number 3 for United States Patent #7635624.

A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an imager in which pixels in an array includes a capacitor and readout circuitry with NMOS transistors. Periphery circuitry around the array can include PMOS transistors. Because the silicide layer is formed after the conductive layers, it is not exposed to high temperatures and, therefore, migration and cross-contamination of dopants is reduced.

  Recently Added Patents
Apparatus and method for layered decoding in a communication system using low-density parity-check codes
Semiconductor device and manufacturing method
Architecture and method for multi-aspect touchscreen scanning
Method and device for generating low-jitter clock
Method and apparatus for managing communication services for user endpoint devices
Multifunction switch for vehicle having lighting module
Method and system for automatically hiding irrelevant parts of hierarchical structures in computer user interfaces
  Randomly Featured Patents
Bicycle support and load mechanism
Jewelry display box
Electrical system for a motor vehicle
Tamper indicating cover
Pneumatic tire tread and buttress
Process for producing yellow iron oxide pigments
Method for forming sputter target assemblies
Process and apparatus for preparation of phenols
Method of exchanging information between two networks operating under different routing protocols
Oxide island structure for flexible inkjet printhead and method of manufacture thereof