Resources Contact Us Home
Dual gate structure for imagers and method of formation

Image Number 3 for United States Patent #7635624.

A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an imager in which pixels in an array includes a capacitor and readout circuitry with NMOS transistors. Periphery circuitry around the array can include PMOS transistors. Because the silicide layer is formed after the conductive layers, it is not exposed to high temperatures and, therefore, migration and cross-contamination of dopants is reduced.

  Recently Added Patents
Advanced CAPTCHA using images in sequence
Editing device and editing method
Artifact removal in nuclear images
Liquid crystal display backlight control
Decoration holder
Stopper, motor, and disk drive apparatus
Image processing apparatus, remote management system, license update method, and computer program product
  Randomly Featured Patents
Ring for probe card
Lumped cross-coupled Wilkinson circuit
System and method for speech verification using a confidence measure
Polypeptides and biosynthetic pathways for the production of stereoisomers of monatin and their precursors
Absorbable crystalline copolyester-based bioactive hydroforming luminal liner compositions
Method and computer program product of keeping configuration data history using duplicated ring buffers
Shelf for a wall system
Method and device for operating a clutch
Data processing apparatus and data processing method
Radionuclide labeling of vitamin B.sub.12 and coenzymes thereof