Resources Contact Us Home
FIFO device

Image Number 5 for United States Patent #7606941.

A receiving FIFO device can prevent a PCI bus from being occupied unnecessarily to enhance the performance of a whole system. An input control part checks in a third comparing part whether or not a received packet written in a memory part is an error packet on the basis of acknowledge information contained in a trailer part of the received packet. If the received packet is the error packet, the input control part supplies a signal EMPTY being HIGH to an output control device and cancels the received packet, thereby preventing the error packet from being transferred to a receiving DMA device. Furthermore, the input control part checks in a second comparing part whether or not the received packet written in the memory part belongs to a predetermined type of packet on the basis of tcode information contained in the first quadret of a header part of the received packet. Only if the received packet belongs to the predetermined type of packet, the input control part cancels the received packet for a predetermined type of error.

  Recently Added Patents
Vertical gate LDMOS device
High-efficiency preambles for communications systems over pseudo-stationary communication channels
Managing job execution
Validating the configuration of distributed systems
Wireless updating of hearing devices
Method and apparatus for diagnosing faults in a hybrid internet protocol network
Image forming apparatus and method
  Randomly Featured Patents
Hinge for refrigerator door
Promotion of C2 state in ferroelectric liquid crystal devices
Optical connector with a shutter
Optical code division multiple access data storage encryption and retrieval
Sanitary packaging system
Compliant multichip package
Gesture recognition
Switch cover
Process for the production of resins for printing ink
Remultiplexing apparatus and method based on reallocated decoding time