Resources Contact Us Home
Method for enhancing electrode surface area in DRAM cell capacitors

Image Number 3 for United States Patent #7573121.

Methods for forming the lower electrode of a capacitor in a semiconductor circuit, and the capacitors formed by such methods are provided. The lower electrode is fabricated by forming a texturizing underlayer and then depositing a conductive material thereover. In one embodiment of a method of forming the lower electrode, the texturizing layer is formed by depositing a polymeric material comprising a hydrocarbon block and a silicon-containing block, over the insulative layer of a container, and then subsequently converting the polymeric film to relief or porous nanostructures by exposure to UV radiation and ozone, resulting in a textured porous or relief silicon oxycarbide film. A conductive material is then deposited over the texturizing layer resulting in a lower electrode have an upper roughened surface. In another embodiment of a method of forming the lower electrode, the texturizing underlayer is formed by depositing overlying first and second conductive metal layers and annealing the metal layers to form surface dislocations, preferably structured as a periodic network. A conductive metal is then deposited in gaseous phase, and agglomerates onto the surface dislocations of the texturizing layer, forming nanostructures in the form of island clusters. The capacitor is completed by depositing a dielectric layer over the formed lower electrode, and forming an upper capacitor electrode over the dielectric layer. The capacitors are particularly useful in fabricating DRAM cells.

  Recently Added Patents
Note tab
Predicting popularity of electronic publications
Escalating data backup protection in response to a failure in a cluster of nodes
Inhibitors of the mevalonate pathway of Streptococcus pneumoniae
Method and system for coordinating client and host security modules
Digital media content distribution
System and method for reducing the risks involved in trading multiple spread trading strategies
  Randomly Featured Patents
Power-on reset circuit, and semiconductor device
Putter head
Method and system for debugging parallel and distributed applications
Thin walled turbine blade and process for making the blade
Latch mechanism for rotary actuator and the like
Containment assembly for fill pipe of underground storage tanks
Flag management in processors enabled for speculative execution of micro-operation traces
Front-side illuminated, back-side contact double-sided PN-junction photodiode arrays
Manufactured granular substrate and method for producing the same
Hydraulic gear machine having a transmission shaft in a bearing tube