Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Field effect transistor having a stressed dielectric layer based on an enhanced device topography










Image Number 8 for United States Patent #7563731.

By increasing the transistor topography after forming a first layer of highly stressed dielectric material, additional stressed material may be added, thereby efficiently increasing the entire layer thickness of the stressed dielectric material. The corresponding increase of device topography may be accomplished on the basis of respective placeholder structures or dummy gates, wherein well-established gate patterning processes may be used or wherein nano-imprint techniques may be employed. Hence, in some illustrative embodiments, a significant increase of strain may be obtained on the basis of well-established process techniques.








 
 
  Recently Added Patents
Method and apparatus for transmitting reference signal in multi-antenna system
Compensating for frequency change in flowmeters
Dynamic virtualization and policy-based access control of removable storage devices in a virtualized environment
Magnet-less loudspeaker
Earthquake damage prediction and prevention system and method thereof
System and method for optimizing garbage collection in data storage
Methods and systems for forcing an application to store data in a secure storage location
  Randomly Featured Patents
Tubular-film manufacturing method
Shelf for stereo
Sulfomethylated phenolic material useful in post primary oil recovery
Cassette housing having cassette stoppers to prevent mis-insertion
Central belt locking assembly
Digital watermark detection method and apparatus
Image-receiving sheet for electrophotography and image forming process
Indirect type lithographic printing original plate
Device, method, and program storage medium for executing genetic algorithm
Method of integrating water treatment assemblies