Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Field effect transistor having a stressed dielectric layer based on an enhanced device topography










Image Number 8 for United States Patent #7563731.

By increasing the transistor topography after forming a first layer of highly stressed dielectric material, additional stressed material may be added, thereby efficiently increasing the entire layer thickness of the stressed dielectric material. The corresponding increase of device topography may be accomplished on the basis of respective placeholder structures or dummy gates, wherein well-established gate patterning processes may be used or wherein nano-imprint techniques may be employed. Hence, in some illustrative embodiments, a significant increase of strain may be obtained on the basis of well-established process techniques.








 
 
  Recently Added Patents
Lens barrel and imaging device
Multiple RF band operation in mobile devices
Wrench
Authentication platform and related method of operation
Oral care implement accessory
Multi-mode 3-dimensional image display apparatus
Method and composition for attracting arthropods by volatizing an acid
  Randomly Featured Patents
Firing method & apparatus for random ESD testing
Ophthalmological surgery technique with active patient data card
Nucleic acid detection in cytoplasm
Electrically switchable polymer-dispersed liquid crystal materials
SIP-based user mobility providing apparatus and method
Mass flow measuring instrument
Antimicrobial composites, films, labelstocks, and labels
Packaged assortment of artificial fingernails
System for coring lettuce heads
Pressuring arrangement for the yoke lamination stack for an electric machine