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Transistor and method of manufacturing the same

Image Number 19 for United States Patent #7510918.

In a transistor and a method of manufacturing the transistor, the transistor includes a dummy structure enclosing source/drain structures and channel structures. Thus, a gate electrode of the transistor may be efficiently formed over the channel structures. In addition, the source/drain structure may not grow exceedingly in an epitaxial growth process employed for forming the source/drain structure.

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