Resources Contact Us Home
Semiconductor integrated circuit device

Image Number 9 for United States Patent #7453742.

A semiconductor integrated circuit device includes a charge transfer transistor provided between a bit line and a sense amplifier, and a bit line clamp voltage generating circuit which generates bit line clamp voltage to be applied to the gate of the charge transfer transistor. The bit line clamp voltage generating circuit includes a current mirror circuit, a resistive dividing circuit provided between the input stage of the current mirror circuit and a reference potential node, a potential setting circuit provided between the output node of the resistive dividing circuit and the output stage of the current mirror circuit, and an operational amplifier which compares potential of the input stage of the current mirror circuit with reference potential to control the current mirror circuit. The operational amplifier is configured by transistors other than intrinsic transistors. The bit line clamp voltage is derived from the output stage of the current mirror circuit.

  Recently Added Patents
Recording apparatus, recording method, reproducing apparatus, reproducing method, program, and recording/producing apparatus
Method for fabricating solar cell
Establishing a graphical user interface (`GUI`) theme
Creating and manufacturing documents that initially exceed equipment finishing capacity
Multicolored light converting LED with minimal absorption
Process for the preparation of morphinane analogues
Scalable encoding apparatus, scalable decoding apparatus, scalable encoding method, scalable decoding method, communication terminal apparatus, and base station apparatus
  Randomly Featured Patents
Chain extender for the synthesis of heparinizable, biocompatible polymers
Method for depositing a coating onto a surface of a prosthesis
Painting apparatus
Semiconductor device with tantalum nitride barrier film
Method for continuous hydrogenation of citronellal to form citronellol
Fiber fabric and composite material
Method, system, and computer program product for cross-invalidation handling in a multi-level private cache
Apparatus for limiting filling height of containers
Actively shielded superconducting magnet assembly with improved fringe field compensation
Method and apparatus for non-offensive termination of an outbound call and for detection of an answer of an outbound call by an answering machine