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 Image Number 10 for United States Patent #7446685.
The present invention provides a read channel and a drive capable of suppressing deterioration in performance of a PLL and a Viterbi decoder by using a DC component eliminating means capable of higher-speed operation than hitherto. The location of an edge is determined by using differential of a read signal, and a DC component is detected from the midpoint level of the edge. Detection of a pseudo-edge due to a long mark or space signal is prevented by limiting the absolute value of a maximum or minimum of a differential coefficient when the location of the edge is determined from the differential coefficient of the read signal. Internal operation of a DC component detector is controlled according to the state of the PLL and the magnitude of the DC component.
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