Resources Contact Us Home
Output stage synchronization

Image Number 5 for United States Patent #7436918.

Systems and methods for transferring data across clock domains in a manner that avoids metastability of the data and is very tolerant of variations in the clock signals of the different clock domains. One embodiment of the invention comprises a mechanism for passing data from a first clock to a second clock domain in a digital pulse width modulated (PWM) amplification system. In this embodiment, parallel data is generated in the process of converting PCM data to PWM data. The parallel data is processed in a clock domain having a first clock rate and is passed to a second clock domain having a clock rate that is twice the rate of the first clock domain. The parallel data is then serialized at the higher clock rate of the second clock domain.

  Recently Added Patents
Remotely provisioned wireless proxy
Masking method and apparatus
Electronic hand-held device
Measuring apparatus for measuring a physical property of a sample
Method, system and program for securing redundancy in parallel computing system
Predictive time entry for workforce management systems
Control strategies for a multi-mode drive system
  Randomly Featured Patents
Paper arranging and positioning mechanism in a sorter with a stapler
Visually error-free color image representation
Foldable lotion applicator
Athleticism rating and performance measuring system
Light modulation method for magneto-optical recording device
Image transmission system and image transmission method
Floor fixture
Method for automated placement of articles onto a support
Printer and commodity information processing apparatus
Method of and apparatus for lubricating an apparatus having a number of lubricant locations