Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Output stage synchronization










Image Number 5 for United States Patent #7436918.

Systems and methods for transferring data across clock domains in a manner that avoids metastability of the data and is very tolerant of variations in the clock signals of the different clock domains. One embodiment of the invention comprises a mechanism for passing data from a first clock to a second clock domain in a digital pulse width modulated (PWM) amplification system. In this embodiment, parallel data is generated in the process of converting PCM data to PWM data. The parallel data is processed in a clock domain having a first clock rate and is passed to a second clock domain having a clock rate that is twice the rate of the first clock domain. The parallel data is then serialized at the higher clock rate of the second clock domain.








 
 
  Recently Added Patents
Loudspeaker grille
Signal conversion control circuit for touch screen and method thereof
Use of natural query events to improve online advertising campaigns
Generating wiki pages from content and transformation objects
System and method for leveraging independent innovation in entertainment content and graphics hardware
System and method for managing investment funds
Adjusting dental prostheses based on soft tissue
  Randomly Featured Patents
Weak mating force female terminal
Opening switch for interrupting current using a plasma focus device
Composite thermal transfer sheet
Ethel beverage container
Magnetic snap lock
Inflatable splint
Apparatus for adjusting the leverage of an oar or scull while rowing
Superconducting dot/anti-dot flux qubit based on time-reversal symmetry breaking effects
Decora-sized wall-mounted 6-button keypad
Water spray retort system suitable for paperboard packages