Resources Contact Us Home

Image Number 10 for United States Patent #7420535.

A display capable of suppressing reduction of a scanning property is provided. This display comprises a shift register circuit formed by connecting a plurality of first circuit parts each including a first conductivity type first transistor connected to a first potential and turned on in response to a clock signal, a first conductivity type second transistor connected to a second potential and a first conductivity type third transistor, connected between the gate of the first transistor and the second potential, having two gate electrodes electrically connected with each other.

  Recently Added Patents
Fabrication method of semiconductor device and fabrication method of dynamic threshold transistor
Sabatier process and apparatus for controlling exothermic reaction
Protocol delay measuring device and protocol delay measuring method
System for hot-start amplification via a multiple emulsion
Washing machine
Method and device for accessing the documentation of an aircraft according to alarms generated therein
Field emission cathode structure
  Randomly Featured Patents
Trigger activated vented valve system
Method of reducing the pore density in a casting
Golfer's sighting aid for putting
Dynamic administration of component event reporting in a distributed processing system
Bipolar transistors with low base resistance for CMOS integrated circuits
Borates useful for the prevention/mitigation of microbiologically influenced corrosion and staining
Electromagnetic valve
Refractory metal coated articles for use in molten metal environments
Axle housing assembly
Tissue box cover with horizontal projecting ribs