Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Substrate backgate for trigate FET










Image Number 13 for United States Patent #7411252.

Disclosed is a tri-gate field effect transistor with a back gate and the associated methods of forming the transistor. Specifically, a back gate is incorporated into a lower portion of a fin. A tri-gate structure is formed on the fin and is electrically isolated from the back gate. The back gate can be used to control the threshold voltage of the FET. In one embodiment the back gate extends to an n-well in a p-type silicon substrate. A contact to the n-well allows electrical voltage to be applied to the back gate. A diode created between the n-well and p-substrate isolates the current flowing through the n-well from other devices on the substrate so that the back gate can be independently biased. In another embodiment the back gate extends to n-type polysilicon layer on an insulator layer on a p-type silicon substrate. A contact to the n-type polysilicon layer allows electrical voltage to be applied to the back gate. A trench isolation structure extending through the polysilicon layer to the insulator layer isolates current flowing through the polysilicon layer from other devices on the silicon substrate.








 
 
  Recently Added Patents
Method, system and program for securing redundancy in parallel computing system
Roll of continuous web of optical film laminate and production method therefor
Method for remotely measuring fluctuations in the optical index of refraction of a medium
Headset electronics
Method and system for distributing load by redirecting traffic
Discharge circuit and method
Compound semiconductor device and manufacturing method therefor
  Randomly Featured Patents
Chain for accumulating conveyor
Antenna having elements with improved thermal impedance
Door light
Electric motor with improved cooling system
Rotary compressor and refrigerant cycle system having the same
Method and apparatus for sternal closure
Log splitter
Method for identifying type of optical disk
Non-volatile semiconductor memory device having an area responsive to writing allowance signal
Estimating the residual life of a software system under a software-based failure mechanism