Resources Contact Us Home
Method of fabricating recess channel array transistor

Image Number 2 for United States Patent #7361537.

A method of fabricating a recess channel array transistor is disclosed. An impurity region is formed in a semiconductor substrate. Then, a polysilicon layer is formed on the semiconductor substrate, both of which are then etched to form a trench that defines an active region. By filling the trench with an insulating material, a STI and an interlayer insulating layer are formed. A patterned mask layer is formed to be used for etching the polysilicon layer and the interlayer insulating layer, thereby forming an opening that defines a contact pad. A Spacer is formed along a sidewall of the contact pad. Using the mask layer and the spacer, the semiconductor substrate is etched to thereby form a recess channel trench. Thereafter, a gate insulating layer and a gate conductive layer are formed. A nitride layer is formed on the resultant structure, and chemical mechanical polishing is performed to isolate the nodes.

  Recently Added Patents
Methods and systems for motion estimation with nonlinear motion-field smoothing
Grip for a racket
X-ray imaging
Playlist search device, playlist search method and program
Reflective mask blank and method of manufacturing a reflective mask
Instrumenting configuration and system settings
Peptide vectors
  Randomly Featured Patents
Device for measuring the parameters of a vehicle characteristic attitude
LED light source with lens and corresponding production method
Balancer for an automatic washer
Method for protecting a microcomputer system against manipulation of data stored in a storage arrangement of the microcomputer system
Differential negative resistance memory
DC inductor
Biodegradable foamed plastic materials
Easy-open wall
Semiconductor memory devices including precharge circuit and methods for precharging