Resources Contact Us Home
Interleaver for iterative decoder

Image Number 16 for United States Patent #7360040.

Interleaver for iterative decoder. A memory management scheme allows for single plane/single port memory devices to be used by the interleaver. The design is adaptable to soft-in soft-out (SISO) decoders that perform iterative decoding. The interleaver may be implemented within communication devices that implement two distinct SISOs that operate cooperatively or within communication devices that employ a single SISO (in a recycled embodiment) that functionally performs the analogous decoding operations that would be performed by the two distinct SISO implementation. The use of single plane/single port memory devices by the interleaver allows for a great deal of savings from many perspectives: the sizes of the required interleaver memory and the interleaver pattern memory are both cut in half using this approach, and a cost savings may also be realized, in that, cheaper, slower memories may be used since each respective interleaver memory is read only every other cycle.

  Recently Added Patents
Method and system for detecting target objects
Plants and seeds of corn variety CV294874
Test framework of visual components in a multitenant database environment
Over the counter medicinal container with surface ornamentation
Taste receptors of the T1R family from domestic cat
Stretchable elastic laminate having increased CD elongation zones and method of production
  Randomly Featured Patents
High temperature measuring device
Metal oxide TFT with improved source/drain contacts
High speed precision planter
Debris sensor for cleaning apparatus
Light pipe light source with flux condensing light pipe
Bar code scanner and method
Method and apparatus for operating a bit-slice keyword access optical memory
Capping before barrier-removal IC fabrication method
Product and process for stabilizing aloe vera gel
Package for ink jet head